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C8051F300 Datasheet(PDF) 25 Page - List of Unclassifed Manufacturers

Part # C8051F300
Description  Mixed Signal ISP Flash MCU Family
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C8051F300/1/2/3/4/5
Rev. 2.6
25
1.8.
Comparator
C8051F300/1/2/3/4/5 devices include an on-chip voltage comparator that is enabled/disabled and config-
ured via user software. All Port I/O pins may be configurated as comparator inputs. Two comparator out-
puts may be routed to a Port pin if desired: a latched output and/or an unlatched (asynchronous) output.
Comparator response time is programmable, allowing the user to select between high-speed and low-
power modes. Positive and negative hysteresis is also configurable.
Comparator interrupts may be generated on rising, falling, or both edges. When in IDLE mode, these inter-
rupts may be used as a “wake-up” source. The comparator may also be configured as a reset source.
Figure 1.11. Comparator Block Diagram
Reset
Decision
Tree
+
-
Crossbar
Interrupt
Handler
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
(SYNCHRONIZER)
GND
CP0 +
P0.0
P0.2
P0.4
P0.6
CP0 -
P0.1
P0.3
P0.5
P0.7
VDD


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