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C8051F300 Datasheet(PDF) 39 Page - List of Unclassifed Manufacturers

Part # C8051F300
Description  Mixed Signal ISP Flash MCU Family
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C8051F300/1/2/3/4/5
Rev. 2.6
39
5.3.3. Settling Time Requirements
When the ADC0 input configuration is changed (i.e., a different AMUX0 or PGA selection is made), a mini-
mum tracking time is required before an accurate conversion can be performed. This tracking time is deter-
mined by the AMUX0 resistance, the ADC0 sampling capacitance, any external source resistance, and the
accuracy required for the conversion. Note that in low-power tracking mode, three SAR clocks are used for
tracking at the start of every conversion. For most applications, these three SAR clocks will meet the mini-
mum tracking time requirements.
Figure 5.5 shows the equivalent ADC0 input circuits for both Differential and Single-ended modes. Notice
that the equivalent time constant for both input circuits is the same. The required ADC0 settling time for a
given settling accuracy (SA) may be approximated by Equation 5.1. When measuring the Temperature
Sensor output or VDD with respect to GND, RTOTAL reduces to RMUX. See Table 5.1 for ADC0 minimum
settling time (track/hold time) requirements.
Equation 5.1. ADC0 Settling Time Requirements
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
RTOTAL is the sum of the AMUX0 resistance and any external source resistance.
n is the ADC resolution in bits (8).
Figure 5.5. ADC0 Equivalent Input Circuits
t
2
n
SA
-------

 R
TOTALCSAMPLE
×
ln
=
R
MUX = 5k
RC
Input= RMUX * CSAMPLE
R
MUX = 5k
C
SAMPLE = 5pF
C
SAMPLE = 5pF
MUX Select
MUX Select
Differential Mode
P0.x
P0.y
R
MUX = 5k
C
SAMPLE = 5pF
RC
Input= RMUX * CSAMPLE
MUX Select
Single-Ended Mode
P0.x
Note: When the PGA gain is set to 0.5, C
SAMPLE = 3pF


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