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C8051F300 Datasheet(PDF) 50 Page - List of Unclassifed Manufacturers |
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C8051F300 Datasheet(HTML) 50 Page - List of Unclassifed Manufacturers |
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50 / 174 page  C8051F300/1/2/3/4/5 50 Rev. 2.6 The output of Comparator0 can be polled in software, used as an interrupt source, and/or routed to a Port pin. When routed to a Port pin, the Comparator0 output is available asynchronous or synchronous to the system clock; the asynchronous output is available even in STOP mode (with no system clock active). When disabled, the Comparator0 output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic low state, and its supply current falls to less than 100 nA. See Section “12.1. Priority Crossbar Decoder” on page 100 for details on configuring the Comparator0 output via the digital Crossbar. Comparator0 inputs can be externally driven from –0.25 to (VDD) + 0.25 V without damage or upset. The complete electrical specifications for Comparator0 are given in Table 7.1. The Comparator0 response time may be configured in software via the CP0MD1-0 bits in register CPT0MD (see SFR Definition 7.3). Selecting a longer response time reduces the amount of power con- sumed by Comparator0. See Table 7.1 for complete timing and power consumption specifications. Figure 7.2. Comparator Hysteresis Plot The hysteresis of Comparator0 is software-programmable via its Comparator0 Control register (CPT0CN). The user can program both the amount of hysteresis voltage (referred to the input voltage) and the positive and negative-going symmetry of this hysteresis around the threshold voltage. The Comparator0 hysteresis is programmed using Bits3–0 in the Comparator0 Control Register CPT0CN (shown in SFR Definition 7.1). The amount of negative hysteresis voltage is determined by the settings of the CP0HYN bits. As shown in Figure 7.2, settings of 20, 10 or 5 mV of negative hysteresis can be pro- grammed, or negative hysteresis can be disabled. In a similar way, the amount of positive hysteresis is determined by the setting the CP0HYP bits. Positive Hysteresis Voltage (Programmed with CP0HYP Bits) Negative Hysteresis Voltage (Programmed by CP0HYN Bits) VIN- VIN+ INPUTS CIRCUIT CONFIGURATION + _ CP0+ CP0- CP0 VIN+ VIN- OUT VOH Positive Hysteresis Disabled Maximum Positive Hysteresis Negative Hysteresis Disabled Maximum Negative Hysteresis OUTPUT VOL |
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