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C8051F300 Datasheet(PDF) 67 Page - List of Unclassifed Manufacturers

Part # C8051F300
Description  Mixed Signal ISP Flash MCU Family
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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C8051F300 Datasheet(HTML) 67 Page - List of Unclassifed Manufacturers

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C8051F300/1/2/3/4/5
Rev. 2.6
67
SFR Definition 8.2. DPH: Data Pointer High Byte
SFR Definition 8.3. SP: Stack Pointer
Bits7–0: DPH: Data Pointer High.
The DPH register is the high byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed Flash memory.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0x83
Bits7–0: SP: Stack Pointer.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incremented
before every PUSH operation. The SP register defaults to 0x07 after reset.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000111
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0x81


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