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C8051F300 Datasheet(PDF) 88 Page - List of Unclassifed Manufacturers |
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C8051F300 Datasheet(HTML) 88 Page - List of Unclassifed Manufacturers |
88 / 174 page ![]() C8051F300/1/2/3/4/5 88 Rev. 2.6 10.1.3. Flash Write Procedure Flash bytes are programmed by software with the following sequence: Step 1. Disable interrupts (recommended). Step 2. Erase the 512-byte Flash page containing the target location, as described in Section 10.1.2. Step 3. Set the PSWE bit in PSCTL. Step 4. Clear the PSEE bit in PSCTL. Step 5. Write the first key code to FLKEY: 0xA5. Step 6. Write the second key code to FLKEY: 0xF1. Step 7. Using the MOVX instruction, write a single data byte to the desired location within the 512- byte sector. Steps 5–7 must be repeated for each byte to be written. After Flash writes are complete, PSWE should be cleared so that MOVX instructions do not target program memory. Writing to and erasing the Reserved area of Flash should be avoided. 10.2. Non-Volatile Data Storage The Flash memory can be used for non-volatile data storage as well as program code. This allows data such as calibration coefficients to be calculated and stored at run time. Data is written using the MOVX instruction and read using the MOVC instruction. 10.3. Security Options The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft- ware as well as to prevent the viewing of proprietary program code and constants. The Program Store Write Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly set to ‘1’ before software can modify the Flash memory; both PSWE and PSEE must be set to ‘1’ before software can erase Flash memory. Additional security features prevent proprietary program code and data constants from being read or altered across the C2 interface. A security lock byte stored at the last byte of Flash user space protects the Flash program memory from being read or altered across the C2 interface. See Table 10.2 for the security byte description; see Figure 10.1 for a program memory map and the security byte locations for each device. Table 10.1. Flash Electrical Characteristics Parameter Conditions Min Typ Max Units Flash Size C8051F300/1/2/3 8192* bytes C8051F304 4096 bytes C8051F305 2048 bytes Endurance 20k 100 k Erase/Write Erase Cycle Time 25 MHz System Clock 10 15 20 ms Write Cycle Time 25 MHz System Clock 40 55 70 µs SYSCLK Frequency (Flash writes from application code) 100 kHz *Note: 512 bytes at location 0x1E00 to 0x1FFF are reserved. |
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