RTL8201N-GR_07_09 datasheet(3/46 Pages) REALTEK

Part #	RTL8201N-GR_07

Description	SINGLE-CHIP/PORT 10/100 FAST ETHERNET PHYCEIVER WITH AUTO MDIX

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Manufacturer	REALTEK [Realtek Semiconductor Corp.]

Direct Link	https://www.realtek.com/en/

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3 / 46 page

RTL8201N &RTL8201R

Datasheet

Single-Chip/Port 10/100 Fast Ethernet PHYceiver

with Auto MDIX

iii

Track ID: JATR-1076-21 Rev. 1.3

REVISION HISTORY

Revision

Release Date

Summary

1.0

2006/06/29

First release.

1.1

2006/08/22

Revised pin names:

PWFBOUT18 => PWOUT18

PWFBOUT15 => PWOUT15.

Revised RTL8201N-GR (64-Pin QFN) Pin Assignments:

DVDD33 (pin 18, 34, 49) => NC

DVDD15 (pin 32, 45, 59) => NC (see Table 9 and Table 10).

Revised Table 32, Power Dissipation, page 27.

1.2

2007/02/12

Revised COL/CONFIG[6] description, Table 2, MII Interface, page 6.

Added section 6.3 RMII Interface, page 7.

Revised Table 32, Power Dissipation, page 27.

Added section 9.2.3 RMII Transmission Cycle Timing, page 31.

1.3

2007/09/17

Added RTL8201R data.

Revised Figure 1, page 3 (Added RMII Interface).

Revised Table 3 RMII Interface, page 7 (REFCLK description).

Revised Table 5 Clock Interface, page 8 (exchanged the pin numbers of

CKXTAL1 and CKXTAL2.

Revised Table 28 Auto-Negotiation Mode Pin Settings, page 22 (modified

MII/SNI description).

Modified section 9.2.3 and section 9.2.4 RMII Transmission/Reception Cycle

Timing, page 31.

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RTL8201N-GR_07 Datasheet(PDF) 3 Page - Realtek Semiconductor Corp.

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