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STM32F722VCK7TR Datasheet(PDF) 181 Page - STMicroelectronics |
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STM32F722VCK7TR Datasheet(HTML) 181 Page - STMicroelectronics |
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181 / 229 page  DS11853 Rev 6 181/229 STM32F722xx STM32F723xx Electrical characteristics 201 Figure 64. Asynchronous multiplexed PSRAM/NOR read waveforms Table 96. Asynchronous non-multiplexed SRAM/PSRAM/NOR write - NWAIT timings(1) 1. Guaranteed by characterization results. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 8Thclk -1 8Thclk +1 ns tw(NWE) FMC_NWE low time 6Thclk -1.5 6Thclk +0.5 tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high 6Thclk -1 - th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid 4Thclk + 2 - NBL Data FMC_ NBL[1:0] FMC_ AD[15:0] tv(BL_NE) th(Data_NE) Address FMC_ A[25:16] tv(A_NE) FMC_NWE t v(A_NE) MS32755V1 Address FMC_NADV t v(NADV_NE) tw(NADV) tsu(Data_NE) th(AD_NADV) FMC_ NE FMC_NOE tw(NE) tw(NOE) tv(NOE_NE) t h(NE_NOE) th(A_NOE) th(BL_NOE) tsu(Data_NOE) th(Data_NOE) FMC_NWAIT tsu(NWAIT_NE) th(NE_NWAIT) |
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