mate bus activity during power-up. Also, if SDA and

SCL are terminated with pullup resistors to a different

supply voltage than the MAX7321’s supply voltage, and

if that pullup supply rises later than the MAX7321’s sup-

ply, then SDA or SCL may appear at power-up to be

connected to GND. In such applications, use the four

address combinations that are selected by connecting

address inputs AD2 and AD0 to V+ or GND (shown in

correct at power-up, independent of SDA and SCL

behavior. If one of the other 12 address combinations is

used, be aware that an unexpected combination of

sion (to any device, not necessarily the MAX7321) is

put on the bus, and an unexpected combination of

ports may initialize as logic-low outputs instead of

inputs or logic-high outputs.

Port Inputs

I/O port inputs switch at the CMOS-logic levels as

determined by the expander’s supply voltage, and are

overvoltage tolerant to +6V, independent of the

expander’s supply voltage.

I/O Port Input Transition Detection

All I/O ports configured as inputs are monitored for

changes since the expander was last accessed

through the serial interface. The state of the input ports

is stored in an internal “snapshot” register for transition

monitoring. The snapshot is continuously compared

with the actual input conditions, and if a change is

detected for any port, INT signals a state change by

going logic low. An internal transition flag is set for that

port. The input is sampled (internally latched into the

snapshot register) and the old transition flags cleared

and write access. The previous port transition flags are

read through the serial interface as the second byte of

a 2-byte read sequence.

8

_______________________________________________________________________________________

PIN

CONNECTION

DEVICE ADDRESS

OUTPUTS POWER-UP DEFAULT

40k

Ω INPUT PULLUPS ENABLED

AD2

AD0

A6 A5

A4

A3

A2

A1

A0

P7

P6

P5

P4

P3

P2

P1

P0

P7

P6

P5

P4

P3

P2

P1

P0

SCL

GND

1

10000

0

1

1

1

1

0

0

0

0

Y

Y

Y

Y

—

—

—

—

SCL

V+

1

10000

1

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

SCL

SCL

1

10001

0

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

SCL

SDA

1

10001

1

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

SDA

GND

1

10010

0

1

1

1

1

0

0

0

0

Y

Y

Y

Y

—

—

—

—

SDA

V+

1

10010

1

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

SDA

SCL

1

10011

0

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

SDA

SDA

1

10011

1

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

GND

GND

11

0

1

00

0

0

000

000

0

—

———

——

—

—

GND

V+

11

0

1

00

1

0

000

111

1

—

—

—

—

YY

Y

Y

GND

SCL

1

10101

0

0

0

0

0

1

1

1

1

—

—

—

—

Y

Y

Y

Y

GND

SDA

1

10101

1

0

0

0

0

1

1

1

1

—

—

—

—

Y

Y

Y

Y

V+

GND

11

0

11

00

1

111

000

0

Y

Y

Y

Y

——

—

—

V+

V+

11

0

11

0

11

111

111

1

Y

YYY

YY

Y

Y

V+

SCL

1

10111

0

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

V+

SDA

1

10111

1

1

1

1

1

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

Table 3. MAX7321 Address Map