LTC4450

7

Rev. 0

For more information www.analog.com

Figure 1. Redundant Diode-OR Power Supplies

For redundant supplies, the highest input supply voltage

conducts all or most of the load current. If this supply’s

voltage droops or is short-circuited, the ideal diode senses

the reverse condition and activates a fast pull-down of

the gate of the internal N-Channel MOSFET. The LTC4450

can withstand a reverse voltage of up to 18V differential

between its power supply and output.

The reverse recovery time is dependent on the high per-

formance OTA’s transient response and gate slew rate.

The reverse recovery current may cause the input supply

voltage to rise, with the amount of voltage rise dependent

on the input supply’s impedance. The safest course of

action is to use capacitors on the input supply whose volt-

age rating is higher than the highest voltage in the system,

or to consider protecting those capacitors with a TVS, for

example.

Following a supply transient, the output voltage droops

until the ideal diode connected to the next highest supply

detects a forward condition and enhances the gate of its

N-Channel MOSFET. The OTA regulates the forward drop

LTC4450 fully enhances the gate of its N-Channel MOSFET

3µs from a reverse bias condition.

To ensure there is minimal droop at the output, select

a low ESR capacitor large enough to ride through the

fast-on delay time. A low ESR bulk capacitor will reduce

IR drops to the output voltage while the load current is

sourced from the capacitor. Use Equation 1 to calculate

the value of the load capacitor that will ride through the

fast-on delay time from reverse mode.

(1)

Shutdown Mode

rent consumption of the part to less than 5µA and pulls

the gate of the internal N-Channel MOSFET to IN to dis-

able it. The STATUS pin is pulled low to indicate that the

LTC4450 is disabled.

Shutdown does not interrupt forward current flow since a

path is still present through the internal MOSFET’s body

power dissipation increases for a given load current. The

of a SHDN# falling edge. Driving SHDN# above 0.85V

gate driver allowing the LTC4450 to operate as an ideal

diode. In shutdown the internal charge pump and gate

re-activate the charge pump and fully enhance the gate

of the N-Channel MOSFET.

If the shutdown feature is not needed then connect the pin

to an external supply voltage above 1.5V. SHDN# may be

driven with a 3.3V or 5V logic signal or with an external

pull-down transistor and pull-up resistor to an external

supply as shown in Figure 2. Ensure that the pull-up resis-

tor is low enough such that the pull-up current overcomes

any leakage present at this pin. If capacitive coupling onto

the SHDN# pin is a concern, a capacitor to ground can

be included.

APPLICATIONS INFORMATION

Figure 2. External SHDN# Control

R1

M1

LTC4450

GND

OUT

IN

SHDN#

2.75V TO 20V

CAPACITOR

(OPTIONAL)

4450 F02

ON

OFF

4450 F01

LTC4450

GND

OUT

IN

12V

LTC4450

GND

OUT

IN

12V

0.1 F

0.1 F