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32G474 Datasheet(PDF) 176 Page - STMicroelectronics |
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32G474 Datasheet(HTML) 176 Page - STMicroelectronics |
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176 / 236 page  Electrical characteristics STM32G474xB STM32G474xC STM32G474xE 176/236 DS12288 Rev 4 Figure 36. SPI timing diagram - slave mode and CPHA = 1 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. Figure 37. SPI timing diagram - master mode 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. MSv41659V1 NSS input CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tsu(NSS) tc(SCK) ta(SO) tv(SO) First bit OUT Next bits OUT Next bits IN Last bit OUT th(SO) tr(SCK) tf(SCK) th(NSS) tdis(SO) First bit IN Last bit IN ai14136c CPHA= 0 MOSI OUTPUT MISO INP UT CPHA= 0 LSB OUT LSB IN CPOL=0 CPOL=1 B I T1 OUT NSS input tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) th(MI) High CPHA=1 CPHA=1 CPOL=0 CPOL=1 tsu(MI) tv(MO) th(MO) MSB IN BIT6 IN MSB OUT |
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