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KSZ9567RTXI Datasheet(PDF) 172 Page - Microchip Technology |
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KSZ9567RTXI Datasheet(HTML) 172 Page - Microchip Technology |
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172 / 232 page ![]() KSZ9567R DS00002329D-page 172 2017-2019 Microchip Technology Inc. 5.2.7.6 Port Priority to Queue Mapping Register Address: 0xN808 - 0xN80B Port N: 1-7 Size: 32 bits Bits Description Type Default 31:28 Regenerated priority (queue) value for priority 7. The 2 most significant bits are reserved. R/W xx11b 27:24 Regenerated priority (queue) value for priority 6. The 2 most significant bits are reserved. R/W xx11b 23:20 Regenerated priority (queue) value for priority 5. The 2 most significant bits are reserved. R/W xx10b 19:16 Regenerated priority (queue) value for priority 4. The 2 most significant bits are reserved. R/W xx10b 15:12 Regenerated priority (queue) value for priority 3. The 2 most significant bits are reserved. R/W xx01b 11:8 Regenerated priority (queue) value for priority 2. The 2 most significant bits are reserved. R/W xx01b 7:4 Regenerated priority (queue) value for priority 1. The 2 most significant bits are reserved. R/W xx00b 3:0 Regenerated priority (queue) value for priority 0. The 2 most significant bits are reserved. R/W xx00b |
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