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KSZ9567RTXI-TR Datasheet(PDF) 227 Page - Microchip Technology

Part # KSZ9567RTXI-TR
Description  7-Port Gigabit Ethernet Switch with Audio Video Bridging and Two RGMII/MII/RMII Interfaces
PDF  232 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

KSZ9567RTXI-TR Datasheet(HTML) 227 Page - Microchip Technology

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 2017-2019 Microchip Technology Inc.
DS00002329D-page 227
KSZ9567R
Section 6.4.8, "Power-up
and Reset Timing," on
page 217
Updated Note 1.
Table 6-12
Added new “trw” entry to table.
DS00002329C (10-23-18)
Section 8.1, "Package Mark-
ing Information," on
page 222
Updated top marking information.
Section 8.2, "Package Draw-
ings," on page 223
Updated package drawings.
Table 4-16, "Matching Rule
Options"
Table updated.
Section 4.4.9, "Tail Tagging
Mode," on page 38
Section updated. Added PTP specific content.
Section 4.1.9, "LinkMD®
Cable Diagnostics," on
page 22
LinkMD details added.
Section 4.4.15, "Low
Latency Cut-Through
Mode," on page 42
Minor text clarification.
Section 4.4.2.4, "Learning,"
on page 29
Text correction.
Section 4.4.2.6, "Aging," on
page 30
Corrected “time stamp” to “age count” in multiple
locations.
Section 5.2.2.5, "PHY Auto-
Negotiation Advertisement
Register," on page 142
Changed default value of Pause (Flow Control)
Capability bit to a note referencing the LED1_1
configuration strap.
Section 5.2.2.10, "PHY
1000BASE-T Control Regis-
ter," on page 146
Corrected bit 10 default value. Added information
on Test Mode Bits 15:13.
Section 5.2.7.4, "Port
Authentication Control Reg-
ister," on page 171
Corrected bits 1:0 description.
Section 5.1.6.11, "Global
PTP Message Config 1 Reg-
ister," on page 115
Corrected 802.3AS to 802.1AS and added descrip-
tions.
Section 5.2.2.16, "PHY
LinkMD Register," on
page 150
Updated register bit descriptions.
Section 5.1.1.4, "Global
Chip ID 3 Register," on
page 70
Corrected bit 0 description.
TABLE A-1:
REVISION HISTORY (CONTINUED)
Revision
Section/Figure/Entry
Correction



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