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STM32WB35CEU6A Datasheet(PDF) 161 Page - STMicroelectronics |
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STM32WB35CEU6A Datasheet(HTML) 161 Page - STMicroelectronics |
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161 / 196 page ![]() DS11929 Rev 14 161/196 STM32WB55xx STM32WB35xx Electrical characteristics 169 Figure 31. SPI timing diagram - Slave mode and CPHA = 0 Figure 32. SPI timing diagram - Slave mode and CPHA = 1 1. Measurement points are set at CMOS levels: 0.3 VDD and 0.7 VDD. MSv41658V1 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tc(SCK) tr(SCK) th(NSS) tdis(SO) tsu(NSS) ta(SO) tv(SO) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(SO) tf(SCK) Last bit IN MSv41659V1 NSS input CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tsu(NSS) tc(SCK) ta(SO) tv(SO) First bit OUT Next bits OUT Next bits IN Last bit OUT th(SO) tr(SCK) tf(SCK) th(NSS) tdis(SO) First bit IN Last bit IN |
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