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S71WS064JB0BAWTY2 Datasheet(PDF) 113 Page - SPANSION |
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S71WS064JB0BAWTY2 Datasheet(HTML) 113 Page - SPANSION |
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113 / 186 page ![]() August 19, 2005 S71WS-J_04_A2 S71WS-J Based MCPs 111 Pr elim inary AC Characteristics :DLW 6WDWH'HFRGLQJ$GGUHVVHV A14, A13, A12 = “111” ⇒ Reserved A14, A13, A12 = “110” ⇒ Reserved A14, A13, A12 = “101” ⇒ 5 programmed, 7 total A14, A13, A12 = “100” ⇒ 4 programmed, 6 total A14, A13, A12 = “011” ⇒ 3 programmed, 5 total A14, A13, A12 = “010” ⇒ 2 programmed, 4 total A14, A13, A12 = “001” ⇒ 1 programmed, 3 total A14, A13, A12 = “000” ⇒ 0 programmed, 2 total 1RWH )LJXUH DVVXPHVDGGUHVV'LVQRW DWDQDGGUHVVERXQGDU\DFWLYHFORFN HGJHLVULVLQJDQGZDLW VWDWH LV VHW WR³´ Figure 36. Example of Wait States Insertion Data AVD# OE# CLK 12 3 4 5 D0 D1 01 6 2 7 3 total number of clock cycles following addresses being latched Rising edge of next clock cycle following last wait state triggers next burst data number of clock cycles programmed 45 |
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