M27C4001

Device operation

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2.4

System Considerations

The power switching characteristics of Advanced CMOS EPROMs require careful

the system designer: the standby current level, the active current level, and transient current

peaks that are produced by the falling and rising edges of E. The magnitude of the transient

current peaks is dependent on the capacitive and inductive loading of the device at the

output. The associated transient voltage peaks can be suppressed by complying with the

two line output control and by properly selected decoupling capacitors. It is recommended

that a 0.1

µF ceramic capacitor be used on every device between V

be a high frequency capacitor of low inherent inductance and should be placed as close to

the device as possible. In addition, a 4.7

µF bulk electrolytic capacitor should be used

power supply connection point. The purpose of the bulk capacitor is to overcome the voltage

drop caused by the inductive effects of PCB traces.

2.5

Programming

When delivered (and after each erasure for UV EPROM), all bits of the M27C4001 are in the

'1' state. Data is introduced by selectively programming '0's into the desired bit locations.

Although only '0's will be programmed, both '1's and '0's can be present in the data word.

The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The

6.25V ± 0.25V.

2.6

PRESTO II Programming Algorithm

PRESTO II Programming Algorithm allows the whole array to be programmed with a

guaranteed margin, in a typical time of 52.5 seconds. Programming with PRESTO II

consists of applying a sequence of 100

µs program pulses to each byte until a correct verify

occurs (see Figure 5). During programming and verify operation, a MARGIN MODE circuit is

automatically activated in order to guarantee that each cell is programmed with enough

margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the

necessary margin to each programmed cell.