ST72F262G2B6 datasheet(158/172 Pages) STMICROELECTRONICS

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ST72260Gx, ST72262Gx, ST72264Gx

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ADC CHARACTERISTICS (Cont’d)

13.12.0.1 General PCB Design Guidelines

To obtain best results, some general design and

layout rules should be followed when designing

the application PCB to shield the noise-sensitive,

analog physical interface from noise generating

CMOS logic signals.

– Properly place components and route the signal

traces on the PCB to shield the analog inputs.

Analog signals paths should run over the analog

ground plane and be as short as possible. Isolate

analog signals from digital signals that may

switch while the analog inputs are being sampled

by the A/D converter. Do not toggle digital out-

puts on the same I/O port as the A/D input being

converted.

ADC Accuracy with fCPU=8 MHz, fADC=4 MHz RAIN< 10kΩ, VDD= 4.5V to 5.5V

Figure 100. ADC Accuracy Characteristics

Notes:

1. ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the analog input pins significantly

reduces the accuracy of the conversion being performed on another analog input.

For IINJ-=0.8mA, the typical leakage induced inside the die is 1.6µA and the effect on the ADC accuracy is a loss of 4 LSB

for each 10K

Ω increase of the external analog source impedance. It is recommended to add a Schottky diode (pin to

ground) to analog pins which may potentially inject negative current. Any positive injection current within the limits spec-

ified for IINJ(PIN) and ΣIINJ(PIN) in Section 13.8 does not affect the ADC accuracy.

2. Refer to “Typical values” on page 126 for more information on typical ADC accuracy values.

Symbol

Parameter

Conditions

FLASH

ROM

Unit

Typ2)

Max

Typ2)

Max

|ET|

Total unadjusted error 1)

TBD

LSB

|EO|

Offset error 1)

TBD

|EG|

Gain Error 1)

4.5

TBD

|ED|

Differential linearity error1)

1.5

4.5

TBD

|EL|

Integral linearity error 1)

4.5

TBD

1LSBIDEAL

1LSB

IDEAL

–

1024

--------------------------------

Vin (LSBIDEAL)

(1) Example of an actual transfer curve

(2) The ideal transfer curve

(3) End point correlation line

ET=Total Unadjusted Error: maximum deviation

between the actual and the ideal transfer curves.

EO=Offset Error: deviation between the first actual

transition and the first ideal one.

EG=Gain Error: deviation between the last ideal

transition and the last actual one.

ED=Differential Linearity Error: maximum deviation

between actual steps and the ideal one.

EL=Integral Linearity Error: maximum deviation

between any actual transition and the end point

correlation line.

Digital Result ADCDR

1023

1022

1021

4567

1021 1022 1023 1024

(1)

(2)

(3)

VDD

VSS

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