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ST92F124 Datasheet(PDF) 321 Page - STMicroelectronics

Part # ST92F124
Description  8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TM(EMULATED EEPROM), CAN 2.0B AND J1850 BLPD
PDF  429 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST92F124 Datasheet(HTML) 321 Page - STMicroelectronics

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J1850 Byte Level Protocol Decoder (JBLPD)
J1850 BYTE LEVEL PROTOCOL DECODER (Cont’d)
10.9.7.2 Stacked Registers
See the description of the OPTIONS register to
obtain more information on the map of the regis-
ters of this section.
JBLPD RECEIVER DMA ADDRESS POINTER
REGISTER (RDAPR)
R252 - RSEL[3:0]=0000b
Register Page: 23
Reset Value: xxxx xxxx (xxh)
To select this register, the RSEL[3:0] bits of the
OPTIONS register must be reset
Bit 7:1 = RA[7:1] Receiver DMA Address Pointer.
RDAPR contains the address of the pointer (in the
Register File) of the Receiver DMA data source
when the DMA between the peripheral and the
Memory Space is selected. Otherwise, when the
DMA between the peripheral and Register File is
selected, this register has no meaning.
See Section 10.9.6.2 for more details on the use of
this register.
Bit 0 = PS Memory Segment Pointer Selector.
This bit is set and cleared by software. It is only
meaningful if RDCPR.RF/MEM = 1.
0: The ISR register is used to extend the address
of data received by DMA (see MMU chapter)
1: The DMASR register is used to extend the ad-
dress of data received by DMA (see MMU chap-
ter)
JBLPD
RECEIVER
DMA
TRANSACTION
COUNTER REGISTER (RDCPR)
R253 - RSEL[3:0]=0000b
Register Page: 23
Reset Value: xxxx xxxx (xxh)
To select this register, the RSEL[3:0] bits of the
OPTIONS register must be reset
Bit 7:1 = RC[7:1] Receiver DMA Counter Pointer.
RDCPR contains the address of the pointer (in the
Register File) of the DMA receiver transaction
counter when the DMA between Peripheral and
Memory Space is selected. Otherwise, if the DMA
between Peripheral and Register File is selected,
this register points to a pair of registers that are
used as DMA Address register and DMA Transac-
tion Counter.
See Section 10.9.6.1and Section 10.9.6.2 for
more details on the use of this register.
Bit 0 = RF/MEM Receiver Register File/Memory
Selector.
If this bit is set to “1”, then the Register File will be
selected as Destination, otherwise the Memory
space will be used.
0: Receiver DMA with Memory space
1: Receiver DMA with Register File
JBLPD TRANSMITTER DMA ADDRESS POINT-
ER REGISTER (TDAPR)
R254 - RSEL[3:0]=0000b
Register Page: 23
Reset Value: xxxx xxxx (xxh)
To select this register, the RSEL[3:0] bits of the
OPTIONS register must be reset
Bit 7:1 = TA[7:1] Transmitter DMA Address Point-
er.
TDAPR contains the address of the pointer (in the
Register File) of the Transmitter DMA data source
when the DMA between the Memory Space and
the peripheral is selected. Otherwise, when the
DMA between Register File and the peripheral is
selected, this register has no meaning.
See Section 10.9.6.2 for more details on the use of
this register.
Bit 0 = PS Memory Segment Pointer Selector.
This bit is set and cleared by software. It is only
meaningful if TDCPR.RF/MEM = 1.
0: The ISR register is used to extend the address
of data transmitted by DMA (see MMU chapter)
1: The DMASR register is used to extend the ad-
dress of data transmitted by DMA (see MMU
chapter)
70
RA7
RA6
RA5
RA4
RA3
RA2
RA1
PS
70
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RF/MEM
70
TA7
TA6
TA5
TA4
TA3
TA2
TA1
PS
9



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