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DSPIC30F2012AT20E/ML Datasheet(PDF) 171 Page - Microchip Technology |
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DSPIC30F2012AT20E/ML Datasheet(HTML) 171 Page - Microchip Technology |
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171 / 205 page ![]() © 2006 Microchip Technology Inc. DS70139E-page 169 dsPIC30F2011/2012/3012/3013 FIGURE 20-13: SPI MODULE MASTER MODE (CKE =1) TIMING CHARACTERISTICS TABLE 20-30: SPI MODULE MASTER MODE (CKE = 1) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic(1) Min Typ(2) Max Units Conditions SP10 TscL SCKX output low time(3) TCY/2 — — ns — SP11 TscH SCKX output high time(3) TCY/2 — — ns — SP20 TscF SCKX output fall time(4) — — — ns See parameter DO32 SP21 TscR SCKX output rise time(4) — — — ns See parameter DO31 SP30 TdoF SDOX data output fall time(4) — — — ns See parameter DO32 SP31 TdoR SDOX data output rise time(4) — — — ns See parameter DO31 SP35 TscH2doV, TscL2doV SDOX data output valid after SCKX edge — — 30 ns — SP36 TdoV2sc, TdoV2scL SDOX data output setup to first SCKX edge 30 — — ns — SP40 TdiV2scH, TdiV2scL Setup time of SDIX data input to SCKX edge 20 — — ns — SP41 TscH2diL, TscL2diL Hold time of SDIX data input to SCKX edge 20 — — ns — Note 1: These parameters are characterized but not tested in manufacturing. 2: Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 3: The minimum clock period for SCK is 100 ns. Therefore, the clock generated in master mode must not violate this specification. 4: Assumes 50 pF load on all SPI pins. SCKX (CKP = 0) SCKX (CKP = 1) SDOX SDIX SP36 SP30,SP31 SP35 MSb MSb IN BIT 14 - - - - - -1 LSb IN BIT 14 - - - -1 LSb Note: Refer to Figure 20-3 for load conditions. SP11 SP10 SP20 SP21 SP21 SP20 SP40 SP41 |
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