PIC16F690-ISLASHSSSQTP datasheet(123/294 Pages) MICROCHIP

123 / 294 page

DS41262D-page 121

PIC16F631/677/685/687/689/690

EECON1: EEPROM CONTROL REGISTER

R/W-x

U-0

R/W-x

R/W-0

R/S-0

EEPGD(1)

—

WRERR

WREN

bit 7

bit 0

Legend:

S = Bit can only be set

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

EEPGD: Program/Data EEPROM Select bit(1)

= Accesses program memory

= Accesses data memory

bit 6-4

Unimplemented: Read as ‘0’

bit 3

WRERR: EEPROM Error Flag bit

= A write operation is prematurely terminated (any MCLR Reset, any WDT Reset during

normal operation or BOR Reset)

= The write operation completed

bit 2

WREN: EEPROM Write Enable bit

= Allows write cycles

= Inhibits write to the data EEPROM

bit 1

WR: Write Control bit

EEPGD = 1:

This bit is ignored

EEPGD = 0:

= Initiates a write cycle (The bit is cleared by hardware once write is complete. The WR bit can only

be set, not cleared, in software.)

= Write cycle to the data EEPROM is complete

bit 0

RD: Read Control bit

= Initiates a memory read (the RD is cleared in hardware and can only be set, not cleared, in

software.)

= Does not initiate a memory read

Note 1:

PIC16F685/PIC16F689/PIC16F690 only.

PIC16F690-I/SSSQTP Datasheet(PDF) 123 Page - Microchip Technology

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