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PIC16F883-E/ML Datasheet(PDF) 205 Page - Microchip Technology

Part # PIC16F883-E/ML
Description  28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology
PDF  288 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F883-E/ML Datasheet(HTML) 205 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
Preliminary
DS41291D-page 203
PIC16F882/883/884/886/887
13.4.16.3
Bus Collision During a Stop
Condition
Bus collision occurs during a Stop condition if:
a)
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
b)
After the SCL pin is de-asserted, SCL is
sampled low before SDA goes high.
The Stop condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 13-26). If the SCL pin is sam-
pled low before SDA is allowed to float high, a bus col-
lision occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 13-27).
FIGURE 13-26:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
FIGURE 13-27:
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDA
SCL
BCLIF
PEN
P
SSPIF
TBRG
TBRG
TBRG
SDA asserted low
SDA sampled
low after TBRG,
set BCLIF
‘0’
‘0’
SDA
SCL
BCLIF
PEN
P
SSPIF
TBRG
TBRG
TBRG
Assert SDA
SCL goes low before SDA goes high,
set BCLIF
‘0’
‘0’



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