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TMS320DM6431 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320DM6431 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 225 page  www.ti.com 1.3 Functional Block Diagram JTAG Interface System Control PLLs/Clock Generator Input Clock(s) Power/Sleep Controller Pin Multiplexing DSP Subsystem C64x+ t DSP CPU 32 KB L1 Pgm 64 KB L2 RAM 32 KB L1 Data BT.656, Y/C, Raw (Bayer) Video Processing Subsystem (VPSS) CCD Controller Video Interface Front End Switched Central Resource (SCR) Peripherals EDMA I2C HECC UART Serial Interfaces DDR2 Mem Ctlr (16b) Async EMIF/ NAND/ (8b) Program/Data Storage Watchdog Timer PWM System General- Purpose Timer EMAC With MDIO Connectivity McASP McBSP OSC Boot ROM 10b GPIO TMS320DM6431 Digital Media Processor SPRS342A – NOVEMBER 2006 – REVISED MARCH 2007 Figure 1-1 shows the functional block diagram of the DM6431 device. Figure 1-1. TMS320DM6431 Functional Block Diagram TMS320DM6431 Digital Media Processor 4 Submit Documentation Feedback |
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Similar Description - TMS320DM6431 |
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