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PS21312 Datasheet(PDF) 7 Page - Mitsubishi Electric Semiconductor |
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PS21312 Datasheet(HTML) 7 Page - Mitsubishi Electric Semiconductor |
7 / 9 page MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module> PS21312 TRANSFER-MOLD TYPE INSULATED TYPE Aug. 1999 Fig. 5 TIMING CHARTS OF THE DIP-IPM PROTECTIVE FUNCTIONS [A] Short-Circuit Protection (Lower-arms only) (For the external shunt resistance and CR connection, please refer to Fig. 3.) a1. Normal operation : IGBT ON and carrying current. a2. Short-circuit current detection (SC trigger). a3. IGBT gate interrupt. a4. IGBT turns OFF. a5. FO timer operation starts : The pulse width of the FO signal is set by the external capacitor CFO. a6. Input “H” : IGBT OFF state. a7. Input “L” : IGBT ON state, but during the FO active signal the IGBT doesn’t turn ON. a8. IGBT OFF state. [B] Under-Voltage Protection (N-side, UVD) a1. Normal operation : IGBT ON and carrying current. a2. Under-voltage trip (UVDt). a3. IGBT OFF inspite of control input condition. a4. FO timer operation starts : The pulse width of the FO signal is set by the external capacitor CFO. a5. Under-voltage reset (UVDr). a6. Normal operation : IGBT ON and carrying current. Note : The CR time constant safe guards against erroneous SC fault signals resulting from di/dt generated voltages when the IGBT turns ON. The optimum setting for the CR circuit time constant is 1.5~2.0 µs. Fault output Fo Sense voltage of the shunt resistance SC reference voltage CR circuit time constant DELAY (*Note) Output current Ic(A) Internal IGBT gate Protection circuit state Lower-arms control input a5 a8 a4 a3 a1 a2 SC RESET SET a7 a6 Fault output Fo (N-side only) Output current Ic(A) Control supply voltage VD Protection circuit state Control input a6 a1 a3 a5 a2 RESET UVDt UVDr SET a4 |
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