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TMP93CS41 Datasheet(PDF) 205 Page - Toshiba Semiconductor

Part # TMP93CS41
Description  CMOS 16-Bit Microcontroller
PDF  248 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP93CS41 Datasheet(HTML) 205 Page - Toshiba Semiconductor

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TMP93CS40/TMP93CS41
2004-02-10
93CS40-203
3.13 Watchdog Timer (Runaway Detection Timer) and Warm-up Timer
The TMP93CS40/S41 contains a watchdog timer for runaway detection.
The watchdog timer (WDT) is used to return the CPU to a normal state when it detects that
the CPU has started to malfunction (runaway) due to causes such as noise. When the watchdog
timer detects a malfunction, it generates a non-maskable interrupt to notify the CPU of the
malfunction, and outputs “0” from the watchdog timer out pin WDTOUT to notify peripheral
devices of the malfunction.
Connecting the watchdog timer output to the reset pin internally forces a reset.
The watchdog timer consists of 7-stage and 15-stage binary counters.
These binary counters are also used as a warm-up timer for internal oscillator stabilization.
This is used for releasing stop and also before changing the system clock.
3.13.1
Configuration
Figure 3.13.1 shows the block diagram for the watchdog timer (WDT).
Figure 3.13.1 Block Diagram for Watchdog Timer/Warm-up Timer
÷2 ÷4 ÷8 ÷16
X1
XT1
fc fc/2
fc/8
fc/4
fc/16
SYSCR1<GEAR2:0>
fc/fs changing warm-up clock
2
SYSCR1<SYSCK>
Selection of WDT and warm-up clock
2
CPU
7-stage
binary
counter
Selector
Selector
15-stage binary counter
2
7
2
9
2
11
2
13
2
15
WDMOD<WARM>
T45CR<QCU>
SYSCR0<WUEF>
WDTOUT
,
interrupt control
WDTI interrupt
Enable
Q
R
S
RESET
SYSCR0<WUEF>
Reset
WDMOD<RESCR>
Internal reset
WDTOUT
Reset
WDMOD<WDTE>
Write disable
code to WDCR
(B1H)
WDMOD
<WDTP1:0>
Reset
HALT instruction
(STOP, IDLE1 mode)
Write clear code
to WDCR
(4EH)
fs



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