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STM32F207ICH6 Datasheet(PDF) 132 Page - STMicroelectronics |
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STM32F207ICH6 Datasheet(HTML) 132 Page - STMicroelectronics |
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132 / 184 page ![]() Electrical characteristics STM32F20xxx 132/184 DocID15818 Rev 15 6.3.23 VBAT monitoring characteristics 6.3.24 Embedded reference voltage The parameters given in Table 71 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 14. 6.3.25 FSMC characteristics Asynchronous waveforms and timings Figure 57 through Figure 60 represent asynchronous waveforms and Table 72 through Table 75 provide the corresponding timings. The results shown in these tables are obtained with the following FSMC configuration: • AddressSetupTime = 1 • AddressHoldTime = 1 • DataSetupTime = 1 • BusTurnAroundDuration = 0x0 In all timing tables, the THCLK is the HCLK clock period. Table 70. VBAT monitoring characteristics Symbol Parameter Min Typ Max Unit R Resistor bridge for VBAT -50 - K Ω QRatio on VBAT measurement - 2 - Er(1) 1. Guaranteed by design, not tested in production. Error on Q –1 - +1 % TS_vbat(2)(2) 2. Shortest sampling time can be determined in the application by multiple iterations. ADC sampling time when reading the VBAT (1 mV accuracy) 5- - µs Table 71. Embedded internal reference voltage Symbol Parameter Conditions Min Typ Max Unit VREFINT Internal reference voltage –40 °C < TA < +105 °C 1.18 1.21 1.24 V TS_vrefint(1) 1. Shortest sampling time can be determined in the application by multiple iterations. ADC sampling time when reading the internal reference voltage -10 - - µs VRERINT_s (2) 2. Guaranteed by design, not tested in production. Internal reference voltage spread over the temperature range VDD = 3 V - 3 5 mV TCoeff(2) Temperature coefficient - - 30 50 ppm/°C tSTART(2) Startup time - - 6 10 µs |
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