STM32F429NET6XXX datasheet(161/231 Pages) STMICROELECTRONICS

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STM32F427xx STM32F429xx

Electrical characteristics

192

RLOAD(2) Resistive load with buffer ON

RO(2)

Impedance output with buffer

OFF

When the buffer is OFF, the Minimum

resistive load between DAC_OUT and

VSS to have a 1% accuracy is 1.5 MΩ

CLOAD(2) Capacitive load

Maximum capacitive load at DAC_OUT

pin (when the buffer is ON).

DAC_OUT

min(2)

Lower DAC_OUT voltage

with buffer ON

0.2

It gives the maximum output excursion of

the DAC.

It corresponds to 12-bit input code

(0x0E0) to (0xF1C) at VREF+ = 3.6 V and

(0x1C7) to (0xE38) at VREF+ = 1.7 V

DAC_OUT

max(2)

Higher DAC_OUT voltage

with buffer ON

VDDA −

0.2

DAC_OUT

min(2)

Lower DAC_OUT voltage

with buffer OFF

-0.5

It gives the maximum output excursion of

the DAC.

DAC_OUT

max(2)

Higher DAC_OUT voltage

with buffer OFF

VREF+ −

1LSB

IVREF+(4)

DAC DC VREF current

consumption in quiescent

mode (Standby mode)

-170

240

µA

With no load, worst code (0x800) at

VREF+ = 3.6 V in terms of DC

consumption on the inputs

-50

With no load, worst code (0xF1C) at

VREF+ = 3.6 V in terms of DC

consumption on the inputs

IDDA(4)

DAC DC VDDA current

consumption in quiescent

mode(3)

-280

380

µA

With no load, middle code (0x800) on the

inputs

-475

625

µA

With no load, worst code (0xF1C) at

VREF+ = 3.6 V in terms of DC

consumption on the inputs

DNL(4)

Differential non linearity

Difference between two

consecutive code-1LSB)

±0.5

LSB Given for the DAC in 10-bit configuration.

±2

LSB Given for the DAC in 12-bit configuration.

INL(4)

Integral non linearity

(difference between

measured value at Code i

and the value at Code i on a

line drawn between Code 0

and last Code 1023)

±1

LSB Given for the DAC in 10-bit configuration.

±4

LSB Given for the DAC in 12-bit configuration.

Offset(4)

Offset error

(difference between

measured value at Code

(0x800) and the ideal value =

VREF+/2)

±10

mV Given for the DAC in 12-bit configuration

±3

LSB

Given for the DAC in 10-bit at VREF+ =

3.6 V

±12

LSB

Given for the DAC in 12-bit at VREF+ =

3.6 V

Gain

error(4)

Gain error

±0.5

Given for the DAC in 12-bit configuration

Table 85. DAC characteristics (continued)

Symbol

Parameter

Min

Typ

Max

Unit

Comments

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