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STM32F429NET6TR Datasheet(PDF) 165 Page - STMicroelectronics |
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STM32F429NET6TR Datasheet(HTML) 165 Page - STMicroelectronics |
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165 / 231 page  DocID024030 Rev 6 165/231 STM32F427xx STM32F429xx Electrical characteristics 192 th(Data_NOE) Data hold time after FMC_NOE high 0 - ns th(Data_NE) Data hold time after FMC_NEx high 0 - ns tv(NADV_NE) FMC_NEx low to FMC_NADV low - 0 ns tw(NADV) FMC_NADV low time - THCLK +1 ns 1. CL = 30 pF. 2. Guaranteed by characterization results. Table 87. Asynchronous non-multiplexed SRAM/PSRAM/NOR read - NWAIT timings(1)(2) 1. CL = 30 pF. 2. Guaranteed by characterization results. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 7THCLK+0.5 7THCLK+1 ns tw(NOE) FMC_NWE low time 5THCLK − 1.5 5THCLK +2 tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high 5THCLK+1.5 - th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid 4THCLK+1 - Table 86. Asynchronous non-multiplexed SRAM/PSRAM/NOR - read timings(1)(2) (continued) Symbol Parameter Min Max Unit |
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