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STM32L412R8T3TR Datasheet(PDF) 110 Page - STMicroelectronics

Part # STM32L412R8T3TR
Description  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 128KB Flash, 40KB SRAM, analog, ext. SMPS
PDF  192 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L412R8T3TR Datasheet(HTML) 110 Page - STMicroelectronics

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Electrical characteristics
STM32L412xx
110/192
DS12469 Rev 4
The consumption for the peripherals when using SMPS can be found using STM32CubeMX
PCC tool.
6.3.6
Wakeup time from low-power modes and voltage scaling
transition times
The wakeup times given in Table 50 are the latency between the event and the execution of
the first user instruction.
The device goes in low-power mode after the WFE (Wait For Event) instruction.
APB2
AHB to APB2(4)
1.0
0.9
0.9
µA/MHz
FW
0.2
0.2
0.2
SPI1
1.7
1.6
1.7
SYSCFG/COMP
0.6
0.5
0.6
TIM1
8.1
6.4
7.6
TIM15
3.7
3.0
3.4
TIM16
2.6
2.1
2.5
USART1 independent clock
domain
4.1
4.1
4.4
USART1 clock domain
1.5
1.2
1.6
All APB2 on
19.2
16.1
17.8
ALL
82.5
63.8
77.2
1. The BusMatrix is automatically active when at least one master is ON (CPU, DMA).
2. The GPIOx (x= A…H) dynamic current consumption is approximately divided by a factor two versus this table values when
the GPIO port is locked thanks to LCKK and LCKy bits in the GPIOx_LCKR register. In order to save the full GPIOx current
consumption, the GPIOx clock should be disabled in the RCC when all port I/Os are used in alternate function or analog
mode (clock is only required to read or write into GPIO registers, and is not used in AF or analog modes).
3. The AHB to APB1 Bridge is automatically active when at least one peripheral is ON on the APB1.
4. The AHB to APB2 Bridge is automatically active when at least one peripheral is ON on the APB2.
Table 49. Peripheral current consumption (continued)
Peripheral
Range 1
Range 2
Low-power run
and sleep
Unit
Table 50. Low-power mode wakeup timings(1)
Symbol
Parameter
Conditions
Typ
Max
Unit
tWUSLEEP
Wakeup time from Sleep
mode to Run mode
-6
6
Nb of
CPU
cycles
tWULPSLEEP
Wakeup time from Low-
power sleep mode to Low-
power run mode
Wakeup in Flash with Flash in power-down
during low-power sleep mode (SLEEP_PD=1 in
FLASH_ACR) and with clock MSI = 2 MHz
68.3



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