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STM32L443CC Datasheet(PDF) 139 Page - STMicroelectronics |
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STM32L443CC Datasheet(HTML) 139 Page - STMicroelectronics |
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139 / 215 page ![]() DS11421 Rev 4 139/215 STM32L443CC STM32L443RC STM32L443VC Electrical characteristics 185 All I/Os are CMOS- and TTL-compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 27 for standard I/Os, and in Figure 27 for 5 V tolerant I/Os. Figure 27. I/O input characteristics Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ± 20 mA (with a relaxed VOL/VOH). In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.2: • The sum of the currents sourced by all the I/Os on VDDIOx, plus the maximum consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating 1. Refer to Figure 27: I/O input characteristics. 2. Tested in production. 3. Guaranteed by design. 4. This value represents the pad leakage of the IO itself. The total product pad leakage is provided by this formula: ITotal_Ileak_max = 10 µA + [number of IOs where VIN is applied on the pad] ₓ Ilkg(Max). 5. All FT_xx GPIOs except FT_u and PC3 I/Os. 6. Max(VDDXXX) is the maximum value of all the I/O supplies. 7. To sustain a voltage higher than Min(VDD, VDDA, VDDUSB, VLCD) +0.3 V, the internal Pull-up and Pull-Down resistors must be disabled. 8. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). |
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