IS25LEG-RLLA2:P-TY datasheet(114/193 Pages) ISSI

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IS25LEG-RLLA2:P-TY Datasheet(PDF) 114 Page - Integrated Silicon Solution, Inc

Part #	IS25LEG-RLLA2:P-TY

Description	SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	193 Pages

Scroll/Zoom	100%

Manufacturer	ISSI [Integrated Silicon Solution, Inc]

Direct Link	http://www.issi.com

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114 / 193 page

IS25LE01GG

IS25WE01GG

Integrated Silicon Solution, Inc.- www.issi.com

114

Rev. A3

10/02/2025

8.31 CLEAR EXTENDED READ REGISTER OPERATION (CLERP, 82h)

A Clear Extended Read Register (CLERP) instruction clears PROT_E, P_ERR, and E_ERR error bits in the

Extended Read Register to “0” when the error bits are set to “1”. Once the error bits are set to “1”, they remains set

to “1” until they are cleared to “0” with a CLERP command.

Figure 8.68 Clear Extended Read Register Sequence In SPI Mode

Instruction = 82h

CE#

SCK

Mode 3

Mode 0

High Impedance

Figure 8.69 Clear Extended Read Register Sequence In QPI Mode

82h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

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