IS25LEG-RMLA2:P-TY datasheet(138/193 Pages) ISSI

Part #	IS25LEG-RMLA2:P-TY

Description	SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	193 Pages

Scroll/Zoom	100%

Manufacturer	ISSI [Integrated Silicon Solution, Inc]

Direct Link	http://www.issi.com

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IS25LE01GG

IS25WE01GG

Integrated Silicon Solution, Inc.- www.issi.com

138

Rev. A3

10/02/2025

Figure 8.93 FRQDTR AX Read Sequence (EDh [EXTADD=0], 3-byte address)

CE #

SCK

3-byte Address

Mode 3

Mode 0

20 16 12

5 1

21 17 13

4 0

IO0

IO1

22 18 14

23 19 15

8 4 0

9 5 1

10 6 2

11 7 3

6 Dummy Cycles

IO2

IO3

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

Data

Out

Data

Out

Data

Out

Data

Out

5 1

4 0

6 2

7 3

Mode Bits

...

Notes:

1. If the mode bits=AXh (where X is don’t care), it will keep executing the AX read mode (without command). When the

mode bits are different from AXh, the device exits the AX read operation.

2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.11 Read Dummy Cycles.

3. Sufficient dummy cycles are required to avoid I/O contention. If the number of dummy cycles and AX bits cycles

are same, then X should be Hi-Z.

IS25LEG-RMLA2:P-TY Datasheet(PDF) 138 Page - Integrated Silicon Solution, Inc

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