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LM12L458CIV Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM12L458CIV
Description  12-Bit Sign Data Acquisition System with Self-Calibration
Download  29 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM12L458CIV Datasheet(HTML) 3 Page - National Semiconductor (TI)

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Absolute Maximum Ratings
(Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
A+ and VD+)
6.0V
Voltage at Input and Output Pins,
except analog inputs
−0.3V to (V
+ + 0.3V)
Voltage at Analog Inputs
− 5V to (V
+ + 5V)
|(V
A+)−(VD+)|
300 mV
Input Current at Any Pin (Note 3)
±5mA
Package Input Current (Note 3)
±20 mA
Power Consumption (T
A = 25˚C)
(Note 4)
875 mW
Storage Temperature
−65˚C to +150˚C
Lead Temperature,
Infrared, 15 sec.
+300˚C
ESD Susceptibility (Note 5)
1.5 kV
See AN-450 “Surface Mounting Methods and Their Effect on
Product Reliability” for other methods of soldering surface
mount devices.
Package Thermal Resistances
Package
θ
JA
44-Lead PLCC
50˚C / W
Operating Ratings (Notes 1, 2)
Temperature Range
−40˚C
≤ T
A
≤ 85˚C
Supply Voltage - V
A+, VD+
+3.0V to +5.5V
|V
A+−VD+|
≤100 mV
V
IN+ Input Range
GND
≤ V
IN+
≤ V
A+
V
IN− Input Range
GND
≤ V
IN−
≤ V
A+
V
REF+ Input Voltage
1V
≤ V
REF+
≤ V
A+
V
REF− Input Voltage
0V
≤ V
REF−
≤ V
REF+ −1V
V
REF+ −VREF−
1V
≤ V
REF
≤ V
A+
V
REF Common Mode
Range (Note 16)
0.1 V
A
+
≤ V
REFCM
≤ 0.6 V
A
+
T
J(MAX)
150˚C
Reliability Information - Transistor
Count
Device
Number
P-Chan MOS Transistor
12,232
N-Chan MOS Transistor
15,457
Parasitic Vertical Bipolar Junction Transistor
4
Parasitic Lateral Bipolar Junction Transistor
2
TOTAL Transistors
27,695
Converter Characteristics
The following specifications apply for V
A+=VD+ = +3.3V, VREF+ = +2.5V, VREF− = 0V, 12-bit + sign conversion mode, fCLK =
6.0 MHz, R
S =25
Ω, source impedance for V
REF+ and VREF−
≤ 25Ω, fully-differential input with fixed 1.25V common-mode volt-
age, and minimum acquisition time unless otherwise specified. Boldface limits apply for T
A =TJ =TMIN to TMAX; all other
limits T
A =TJ = 25˚C. (Notes 6, 7, 8, 9)
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Units
ILE
Integral Linearity Error
After Auto-Cal (Notes 12, 17)
±1/2
±1
LSB (max)
TUE
Total Unadjusted Error
After Auto-Cal (Note 12)
±1
LSB
Resolution with No Missing Codes
After Auto-Cal (Note 12)
13
Bits (max)
DNL
Differential Non-Linearity
After Auto-Cal
±1
LSB (max)
Zero Error
After Auto-Cal (Notes 13, 17)
±1/4
±1
LSB (max)
Positive Full-Scale Error
After Auto-Cal (Notes 12, 17)
±1/2
±3
LSB (max)
Negative Full-Scale Error
After Auto-Cal (Notes 12, 17)
±1/2
±3
LSB (max)
DC Common Mode Error
(Note 14)
±2
±4
LSB (max)
ILE
8-Bit + Sign and “Watchdog” Mode
Integral Linearity Error
(Note 12)
±1/2
LSB (max)
TUE
8-Bit + Sign and “Watchdog” Mode
Total Unadjusted Error
After Auto-Zero
±1/2
±3/4
LSB (max)
8-Bit + Sign and “Watchdog” Mode
Resolution with No Missing Codes
9
Bits (max)
DNL
8-Bit + Sign and “Watchdog” Mode
Differential Non-Linearity
±1
LSB (max)
8-Bit + Sign and “Watchdog” Mode
Zero Error
After Auto-Zero
±1/2
LSB (max)
8-Bit + Sign and “Watchdog” Full-Scale
Error
±1/2
LSB (max)
www.national.com
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