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ST7LITE1XB Datasheet(PDF) 113 Page - STMicroelectronics |
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ST7LITE1XB Datasheet(HTML) 113 Page - STMicroelectronics |
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113 / 159 page ![]() ST7LITE1xB 113/159 13.3.3 Operating Conditions with Low Voltage Detector (LVD) 13.3.3.1 Operating Conditions with LVD at TA = -40 to 125°C, unless otherwise specified Notes: 1. The VDD rise time rate condition is needed to insure a correct device power-on and LVD reset. Not tested in production. 2. Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur in the application, it is rec- ommended to pull VDD down to 0V to ensure optimum restart conditions. Refer to circuit example in Figure 106 on page 136 and note 4. Symbol Parameter Conditions Min Typ Max Unit VIT+(LVD) Reset release threshold (VDD rise) High Threshold Med. Threshold Low Threshold 3.80 3.20 2.65 4.20 3.55 2.85 4.60 3.90 3.10 V VIT-(LVD) Reset generation threshold (VDD fall) High Threshold Med. Threshold Low Threshold 3.70 3.10 2.50 4.00 3.35 2.70 4.35 3.70 2.90 Vhys LVD voltage threshold hysteresis VIT+(LVD)-VIT-(LVD) 200 mV VtPOR VDD rise time rate 1)2) 100 ms/V tg(VDD) Filtered glitch delay on VDD 1) Not detected by the LVD 150 ns IDD(LVD) LVD/AVD current consumption 200 µA |
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