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H8SX1663 Datasheet(PDF) 297 Page - Renesas Technology Corp

Part # H8SX1663
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 Datasheet(HTML) 297 Page - Renesas Technology Corp

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Section 6 Bus Controller (BSC)
Rev.1.00 Jun. 07, 2006 Page 245 of 1102
REJ09B0294-0100
(b) RAS Up Mode
Set the BE bit in DRAMCR to 1 and clear the RCDM bit in DRAMCR to 0 to set the RAS up
mode.
Whenever a DRAM space access is halted and other spaces are accessed, the
RAS signal is driven
high. Only when the DRAM space continues to be accessed, the fast-page mode access (burst
access) is performed.
Figure 6.51 shows a timing example of RAS up mode.
T
p
T
r
T
c1
T
c2
T
2
T
1
T
c1
T
c2
RAS
LUCAS
LLCAS
WE
RD
OE
High
BS
RD/
WR
Row address
Column address
DRAM space read
Basic bus space read
DRAM space read
External address
Column address
B
φ
Address bus
Data bus
Figure 6.51 Timing Example of RAS Up Mode (RAST = 0, CAST = 0)



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