Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

HD6433635SW Datasheet(PDF) 196 Page - Renesas Technology Corp

Part # HD6433635SW
Description  8-Bit Microcomputer
PDF  418 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6433635SW Datasheet(HTML) 196 Page - Renesas Technology Corp

Back Button HD6433635SW Datasheet HTML 192Page - Renesas Technology Corp HD6433635SW Datasheet HTML 193Page - Renesas Technology Corp HD6433635SW Datasheet HTML 194Page - Renesas Technology Corp HD6433635SW Datasheet HTML 195Page - Renesas Technology Corp HD6433635SW Datasheet HTML 196Page - Renesas Technology Corp HD6433635SW Datasheet HTML 197Page - Renesas Technology Corp HD6433635SW Datasheet HTML 198Page - Renesas Technology Corp HD6433635SW Datasheet HTML 199Page - Renesas Technology Corp HD6433635SW Datasheet HTML 200Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 196 / 418 page
background image
182
8-Bit Timer Mode
• TCFH and OCRFH
The output at pin TMOFH toggles when there is a compare match. If the compare match signal
occurs at the same time as new data is written in TCRF by a MOV instruction, however, the
new value written in bit TOLH will be output at pin TMOFH.
If an OCRFH write occurs at the same time as a compare match signal, the compare match
signal is inhibited. If a compare match occurs between the written data and the counter value,
however, a compare match signal will be generated at that point. The compare match signal is
output in synchronization with the TCFH clock.
If a TCFH write occurs at the same time as an overflow signal, the overflow signal is not
output.
• TCFL and OCRFL
The output at pin TMOFL toggles when there is a compare match. If the compare match signal
occurs at the same time as new data is written in TCRF by a MOV instruction, however, the
new value written in bit TOLL will be output at pin TMOFL.
If an OCRFL write occurs at the same time as a compare match signal, the compare match
signal is inhibited. If a compare match occurs between the written data and the counter value,
however, a compare match signal will be generated at that point. The compare match signal is
output in synchronization with the TCFL clock, so if this clock is stopped no compare match
signal will be generated, even if a compare match occurs.
If a TCFL write occurs at the same time as an overflow signal, the overflow signal is not
output.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com