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HD6433635SW Datasheet(PDF) 215 Page - Renesas Technology Corp |
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HD6433635SW Datasheet(HTML) 215 Page - Renesas Technology Corp |
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215 / 418 page  201 Timer Counter Y (TCY) Timer Counter YH (TCYH) Timer Counter YL (TCYL) TCY Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Read/Write R R R R R R R R R R R R R R R R TCYH TCYL Timer counter Y (TCY) is a 16-bit readable up-counter that is incremented by an input internal clock or external events. The input clock is selected with bits TMY2 to TMY0 in TMY. When TCY overflows (from H'FFFF to H'0000, or from H'FFFF to the TLY set value), IRRTY in IRR2 is set to 1. The TCY value can be read by the CPU at any time, but as it is a 16-bit register, data transfer between TCY and the CPU is carried out via a temporary register (TEMP). For details, see 9.5.3, CPU Interface. TCY is allocated to the same address as TLY. Upon reset, TCY is initialized to H'0000. |
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