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ADIS16300 Datasheet(PDF) 10 Page - Analog Devices

Part # ADIS16300
Description  Four Degrees of Freedom Inertial Sensor
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADIS16300 Datasheet(HTML) 10 Page - Analog Devices

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ADIS16300
Rev. 0 | Page 10 of 16
Table 8. User Register Memory Map
Name
R/W
Flash Backup
Address1
Default
Function
Bit Assignments
FLASH_CNT
R
Yes
0x00
N/A
Flash memory write count
N/A
SUPPLY_OUT
R
No
0x02
N/A
Power supply measurement
Table 9
GYRO_OUT
R
No
0x04
N/A
X-axis gyroscope output
Table 9
N/A
N/A
N/A
0x06
N/A
Reserved
N/A
N/A
N/A
N/A
0x08
N/A
Reserved
N/A
XACCL_OUT
R
No
0x0A
N/A
X-axis accelerometer output
Table 9
YACCL_OUT
R
No
0x0C
N/A
Y-axis accelerometer output
Table 9
ZACCL_OUT
R
No
0x0E
N/A
Z-axis accelerometer output
Table 9
TEMP_OUT
R
No
0x10
N/A
X-axis gyroscope temperature measurement
Table 9
PITCH_OUT
R
No
0x12
N/A
X-axis inclinometer output measurement
Table 9
ROLL_OUT
R
No
0x14
N/A
Y-axis inclinometer output measurement
Table 9
AUX_ADC
R
No
0x16
N/A
Auxiliary ADC output
Table 9
N/A
N/A
N/A
0x18
N/A
Reserved
N/A
GYRO_OFF
R/W
Yes
0x1A
0x0000
X-axis gyroscope bias offset factor
Table 10
N/A
N/A
N/A
0x1C
N/A
Reserved
N/A
N/A
N/A
N/A
0x1E
N/A
Reserved
N/A
XACCL_OFF
R/W
Yes
0x20
0x0000
X-axis acceleration bias offset factor
Table 11
YACCL_OFF
R/W
Yes
0x22
0x0000
Y-axis acceleration bias offset factor
Table 11
ZACCL_OFF
R/W
Yes
0x24
0x0000
Z-axis acceleration bias offset factor
Table 11
ALM_MAG1
R/W
Yes
0x26
0x0000
Alarm 1 amplitude threshold
Table 22
ALM_MAG2
R/W
Yes
0x28
0x0000
Alarm 2 amplitude threshold
Table 22
ALM_SMPL1
R/W
Yes
0x2A
0x0000
Alarm 1 sample size
Table 23
ALM_SMPL2
R/W
Yes
0x2C
0x0000
Alarm 2 sample size
Table 23
ALM_CTRL
R/W
Yes
0x2E
0x0000
Alarm control
Table 24
AUX_DAC
R/W
No
0x30
0x0000
Auxiliary DAC data
Table 18
GPIO_CTRL
R/W
No
0x32
0x0000
Auxiliary digital input/output control
Table 16
MSC_CTRL
R/W
Yes
0x34
0x0006
Miscellaneous control
Table 17
SMPL_PRD
R/W
Yes
0x36
0x0001
Internal sample period (rate) control
Table 13
SENS_AVG
R/W
Yes
0x38
0x0402
Dynamic range/digital filter control
Table 15
SLP_CNT
W
No
0x3A
0x0000
Sleep mode control
Table 14
DIAG_STAT
R
No
0x3C
0x0000
System status
Table 21
GLOB_CMD
W
N/A
0x3E
0x0000
System command
Table 12
1 Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte, plus 1.
R/W
R/W
A6
A5
A4
A3
A2
A1
A0
DC7
DC6
DC5
DC4
DC3
DC2
DC1
DC0
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
CS
SCLK
DIN
DOUT
A6
A5
D13
D14
D15
NOTES
1. DOUT BITS ARE BASED ON THE PREVIOUS 16-BIT SEQUENCE (R = 0).
Figure 11. Output Register Bit Assignments
12
3
910
0x3E00
PREVIOUS
DON’T CARE
SUPPLY_OUT
GYRO_OUT
YINCL_OUT
AUX_ADC
XACCL_OUT
YACCL_OUT
45
CS
SCLK
DIN
DOUT
Figure 12. Burst Mode Read Sequence


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