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SM59R16A2 Datasheet(PDF) 52 Page - SyncMOS Technologies,Inc |
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SM59R16A2 Datasheet(HTML) 52 Page - SyncMOS Technologies,Inc |
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52 / 67 page  SM59R16A2/SM59R08A2 8-Bit Micro-controller 64KB/32KB ISP Flash & 2KB RAM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. ISSFD-M034 52 Ver.B SM59R16A2/SM59R08A2 06/2009 15 SPI function Serial Peripheral Interface (SPI) is a synchronous protocol that allows a master device to initiate communication with slave devices. There are 4 signals used in SPI, they are SPI_MOSI: data output in the master mode, data input in the slave mode, SPI_MISO: data input in the master mode, data output in the master mode, SPI_SCK: clock output form the master, the above data are synchronous to this signal SPI_SS: input in the slave mode. This slave device detects this signal to judge if it is selected by the master. In the master mode, it can select the desired slave device by any IO with value = 0. Fig. 15-1 is an example showing the relation of the 4 signals between master and slaves. Fig. 15-1: SPI signals between master and slave devices There is only one channel SPI interface. The SPI SFRs are shown as below: SPI Description Direct Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RESE T SPI function SPIC1 SPI control register 1 F1h SPIEN SPIMSS SPISSP SPICKP SPICKE SPIBR[2:0] 08h SPIC2 SPI control register 2 F2h SPIFD TBC[2:0] - RBC[2:0] 00h SPIS SPI status register F5h - SPIMLS SPIOV SPITXIF SPITDR SPIRXIF SPIRDR SPIRS 40h SPITXD SPI transmit data buffer F3h SPITXD[7:0] 00h SPIRXD SPI receive data buffer F4h SPIRXD[7:0] 00h Master MOSI MISO CLK IO IO Slave 1 MOSI MISO CLK SS Slave 2 MOSI MISO CLK SS |
Similar Part No. - SM59R16A2 |
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Similar Description - SM59R16A2 |
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