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SM59R16A2 Datasheet(PDF) 62 Page - SyncMOS Technologies,Inc |
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SM59R16A2 Datasheet(HTML) 62 Page - SyncMOS Technologies,Inc |
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62 / 67 page  SM59R16A2/SM59R08A2 8-Bit Micro-controller 64KB/32KB ISP Flash & 2KB RAM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. ISSFD-M034 62 Ver.B SM59R16A2/SM59R08A2 06/2009 Mnemonic Description Direct Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RESET ADC ADCC1 ADC Control 1 ABh - - - - ADC3E ADC2E ADC1E ADC0E 00h ADCC2 ADC Control 2 ACh COM START ADC8B - ADCCH[1:0] ADCCS[1:0] 00h ADCDH ADC data high byte ADh - ADCDH [1:0] 00h ADCDL ADC data low byte AEh ADCDL[7:0] 00h Mnemonic: ADCC1 Address: ABh 7 6 5 4 3 2 1 0 Reset - - - - ADC3E ADC2E ADC1E ADC0E 00h ADC3E: =0 : No external analog input data can be accepted via ADC Chanel 3 =1 : ADC Channel 3 is enable, analog input data can be read through it. ADC2E: =0 : No external analog input data can be accepted via ADC Chanel 2 =1 : ADC Channel 2 is enable, analog input data can be read through it. ADC1E: =0 : No external analog input data can be accepted via ADC Chanel 1 =1 : ADC Channel 1 is enable, analog input data can be read through it. ADC0E: =0 : No external analog input data can be accepted via ADC Chanel 0 =1 : ADC Channel 0 is enable, analog input data can be read through it. Mnemonic: ADCC2 Address: ACh 7 6 5 4 3 2 1 0 Reset COM START ADC8B - ADCCH[1:0] ADCCS[1:0] 00h COM: When one conversion is done, COM will be set to 1 to notify the users. It will be clear automatically by hardware. This bit is read only. START: When this bit is set, the ADC will be start conversion. It will be clear automatically by hardware. ADC8B: Select 10-bit or 8-bit of ADC converted data. = 0: (default value) 10-bit data conversion ADCD[9:0], where ADCD [9:8] = ADCDH [1:0] and ADCD [7:0] = ADCDL [7:0] = 1: 8-bit data conversion ADCD[7:0] = ADCDL [7:0] ADCCH[1:0] The analog input signal can be chosen with it : = 00 : Chanel 0 is used as input = 01 : Chanel 1 is used as input = 10 : Chanel 2 is used as input = 11 : Chanel 3 is used as input The users must also set the corresponding channel enable bit to 1 as described in ADCC1. ADCCS[1:0]: This is used to select the clock frequency fed to the ADC module : = 00 : ADC clock is system clock divided by 8 = 01 : ADC clock is system clock divided by 16 = 10 : ADC clock is system clock divided by 32 = 11 : ADC clock is system clock divided by 64 Since ADC takes about 20 ADC clock to finish one conversion, so the fastest speed of one conversion is about 160 system clocks with ADCLK=00 ADC Clock = ADCCS 2 8 Fclk × ADC Conversion Time = Clock ADC 20 ADC Sample Rate = Time Conversion ADC 1 |
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