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SM59R16A2 Datasheet(PDF) 12 Page - SyncMOS Technologies,Inc |
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SM59R16A2 Datasheet(HTML) 12 Page - SyncMOS Technologies,Inc |
12 / 67 page SM59R16A2/SM59R08A2 8-Bit Micro-controller 64KB/32KB ISP Flash & 2KB RAM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. ISSFD-M034 12 Ver.B SM59R16A2/SM59R08A2 06/2009 2 Instruction Set All SM59R16A2/SM59R08A2 instructions are binary code compatible and perform the same functions as they do with the industry standard 8051. The following tables give a summary of the instruction set cycles of the SM59R16A2/SM59R08A2 Microcontroller core. Here the “cycles” in the tables means machine cycle, which is two-clock or one-clock depending on IFCON [7]. Table 2-1: Arithmetic operations Mnemonic Description Code Bytes Cycles ADD A, Rn Add register to accumulator 28-2F 1 1 ADD A, direct Add direct byte to accumulator 25 2 2 ADD A, @Ri Add indirect RAM to accumulator 26-27 1 2 ADD A, #data Add immediate data to accumulator 24 2 2 ADDC A, Rn Add register to accumulator with carry flag 38-3F 1 1 ADDC A, direct Add direct byte to A with carry flag 35 2 2 ADDC A, @Ri Add indirect RAM to A with carry flag 36-37 1 2 ADDC A, #data Add immediate data to A with carry flag 34 2 2 SUBB A, Rn Subtract register from A with borrow 98-9F 1 1 SUBB A, direct Subtract direct byte from A with borrow 95 2 2 SUBB A, @Ri Subtract indirect RAM from A with borrow 96-97 1 2 SUBB A, #data Subtract immediate data from A with borrow 94 2 2 INC A Increment accumulator 04 1 1 INC Rn Increment register 08-0F 1 2 INC direct Increment direct byte 05 2 3 INC @Ri Increment indirect RAM 06-07 1 3 INC DPTR Increment data pointer A3 1 1 DEC A Decrement accumulator 14 1 1 DEC Rn Decrement register 18-1F 1 2 DEC direct Decrement direct byte 15 2 3 DEC @Ri Decrement indirect RAM 16-17 1 3 MUL AB Multiply A and B A4 1 5 DIV Divide A by B 84 1 5 DA A Decimal adjust accumulator D4 1 1 |
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