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AT91RM9200-CJ-002 Datasheet(PDF) 36 Page - ATMEL Corporation |
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AT91RM9200-CJ-002 Datasheet(HTML) 36 Page - ATMEL Corporation |
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36 / 701 page  36 1768I–ATARM–09-Jul-09 AT91RM9200 11.3 ARM9TDMI Processor 11.3.1 Instruction Type Instructions are either 32 bits (in ARM state) or 16 bits (in Thumb state). 11.3.2 Data Types ARM9TDMI supports byte (8-bit), half-word (16-bit) and word (32-bit) data types. Words must be aligned to four-byte boundaries and half-words to two-byte boundaries. Unaligned data access behavior depends on which instruction is used in a particular location. 11.3.3 ARM9TDMI Operating Modes The ARM9TDMI, based on ARM architecture v4T, supports seven processor modes: • User: Standard ARM program execution state • FIQ: Designed to support high-speed data transfer or channel processes • IRQ: Used for general-purpose interrupt handling • Supervisor: Protected mode for the operating system • Abort mode: Implements virtual memory and/or memory protection • System: A privileged user mode for the operating system • Undefined: Supports software emulation of hardware coprocessors Mode changes may be made under software control, or may be brought about by external inter- rupts or exception processing. Most application programs will execute in User Mode. The non- user modes, known as privileged modes, are entered in order to service interrupts or exceptions or to access protected resources. 11.3.4 ARM9TDMI Registers The ARM9TDMI processor core consists of a 32-bit datapath and associated control logic. That datapath contains 31 general-purpose registers, coupled to a full shifter, Arithmetic Logic Unit and multiplier. At any one time, 16 registers are visible to the user. The remainder are synonyms used to speed up exception processing. Register 15 is the Program Counter (PC) and can be used in all instructions to reference data relative to the current instruction. R14 holds the return address after a subroutine call. R13 is used (by software convention) as a stack pointer. Table 11-1. ARM9TDMI Modes and Register Layout User and System Mode Supervisor Mode Abort Mode Undefined Mode Interrupt Mode Fast Interrupt Mode R0 R0 R0 R0 R0 R0 R1 R1 R1 R1 R1 R1 R2 R2 R2 R2 R2 R2 R3 R3 R3 R3 R3 R3 R4 R4 R4 R4 R4 R4 |
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