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Revision 1.4

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AS5140H

Data Sheet - D e t a i l e d D e s c r i p t i o n

Figure 15. Enabling the Alignment Mode

Figure 16. Exiting Alignment Mode

7.8 3.3V / 5V Operation

The AS5140H operates either at 3.3V ±10% or at 5V ±10%. This is made possible by an internal 3.3V Low-Dropout (LDO) voltage regulator. The

internal supply voltage is always taken from the output of the LDO, meaning that the internal blocks are always operating at 3.3V. For 3.3V

operation, the LDO must be bypassed by connecting VDD3V3 with VDD5V (see Figure 17).

For 5V operation, the 5V supply is connected to pin VDD5V, while VDD3V3 (LDO output) must be buffered by a 2.2...10µF capacitor, which is

supposed to be placed close to the supply pin (see Figure 17). The VDD3V3 output is intended for internal use only. It must not be loaded with an

external load.

The output voltage of the digital interface I/O’s corresponds to the voltage at pin VDD5V, as the I/O buffers are supplied from this pin (see Figure

17). A buffer capacitor of 100nF is recommended in both cases close to pin VDD5V.

Note that pin VDD3V3 must always be buffered by a capacitor. It must not be left floating, as this may cause an instable internal 3.3V supply

voltage, which may lead to larger than normal jitter of the measured angle.

Prog

CSn

AlignMode enable

Read-out

via SSI

2µs

min.

2µs

min.

Prog

CSn

exit AlignMode

Read-out

via SSI