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HY5PS12421CFP-E3 Datasheet(PDF) 10 Page - Hynix Semiconductor |
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HY5PS12421CFP-E3 Datasheet(HTML) 10 Page - Hynix Semiconductor |
10 / 38 page Rev. 0.8 / Oct. 2007 10 1HY5PS12421C(L)FP 1HY5PS12821C(L)FP 1HY5PS121621C(L)FP 2. Maximum DC Ratings 2.1 Absolute Maximum DC Ratings 2.2 Operating Temperature Condition Symbol Parameter Rating Units Notes VDD Voltage on VDD pin relative to Vss - 1.0 V ~ 2.3 V V 1 VDDQ Voltage on VDDQ pin relative to Vss - 0.5 V ~ 2.3 V V 1 VDDL Voltage on VDDL pin relative to Vss - 0.5 V ~ 2.3 V V 1 VIN, VOUT Voltage on any pin relative to Vss - 0.5 V ~ 2.3 V V 1 TSTG Storage Temperature -55 to +100 ℃ 1, 2 II Input leakage current; any input 0V VIN VDD; all other balls not under test = 0V) -2 uA ~ 2 uA uA IOZ Output leakage current; 0V VOUT VDDQ; DQ and ODT disabled -5 uA ~ 5 uA uA 1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Storage Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions. Please refer to JESD51-2 standard. Symbol Parameter Rating Units Notes tOPER Operating Temperature 0 to 95 °C 1,2 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the mea- surement conditions, please refer to JESD51-2 standard. 2. At tOPER 85~95℃, Double refresh rate(tREFI: 3.9us) is required, and to enter the self refresh mode at this temperature range it must be required an EMRS command to change itself refresh rate. |
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Similar Description - HY5PS12421CFP-E3 |
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