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PIC16F685-E/ML Datasheet(PDF) 298 Page - Microchip Technology |
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PIC16F685-E/ML Datasheet(HTML) 298 Page - Microchip Technology |
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298 / 306 page  PIC16F631/677/685/687/689/690 DS41262E-page 296 © 2008 Microchip Technology Inc. CKP bit .............................................................................. 181 Clock Accuracy with Asynchronous Operation ................. 160 Clock Sources External Modes ........................................................... 49 EC ....................................................................... 49 HS ....................................................................... 50 LP........................................................................ 50 OST..................................................................... 49 RC....................................................................... 51 XT ....................................................................... 50 Internal Modes ............................................................ 51 Frequency Selection ........................................... 53 HFINTOSC.......................................................... 51 HFINTOSC/LFINTOSC Switch Timing ............... 53 INTOSC .............................................................. 51 INTOSCIO........................................................... 51 LFINTOSC .......................................................... 53 Clock Switching................................................................... 55 CM1CON0 Register ............................................................ 98 CM2CON0 Register ............................................................ 99 CM2CON1 Register .......................................................... 101 Code Examples A/D Conversion......................................................... 112 Assigning Prescaler to Timer0 .................................... 82 Assigning Prescaler to WDT ....................................... 82 Changing Between Capture Prescalers .................... 128 Indirect Addressing ..................................................... 44 Initializing PORTA....................................................... 59 Initializing PORTB....................................................... 69 Initializing PORTC....................................................... 76 Loading the SSPBUF (SSPSR) Register .................. 182 Saving STATUS and W Registers in RAM ............... 211 Ultra Low-Power Wake-up Initialization ...................... 63 Write Verify ............................................................... 125 Code Protection ................................................................ 215 Comparator C2OUT as T1 Gate ................................................... 101 Operation .................................................................... 93 Operation During Sleep .............................................. 97 Response Time........................................................... 95 Synchronizing COUT w/Timer1 ................................ 101 Comparator Module ............................................................ 93 Associated registers.................................................. 106 C1 Output State Versus Input Conditions ................... 95 Comparator Voltage Reference (CVREF) Response Time........................................................... 95 Comparator Voltage Reference (CVREF) .......................... 104 Effects of a Reset........................................................ 97 Specifications............................................................ 248 Comparators C2OUT as T1 Gate ..................................................... 85 Effects of a Reset........................................................ 97 Specifications............................................................ 248 Compare Module. See Enhanced Capture/ Compare/PWM (ECCP) CONFIG Register.............................................................. 199 Configuration Bits.............................................................. 198 CPU Features ................................................................... 197 Customer Change Notification Service ............................. 301 Customer Notification Service........................................... 301 Customer Support ............................................................. 301 D D/A bit ............................................................................... 180 Data EEPROM Memory .................................................... 119 Associated Registers ................................................ 126 Code Protection........................................................ 125 Reading .................................................................... 122 Writing ...................................................................... 122 Data Memory ...................................................................... 26 Data/Address bit (D/A)...................................................... 180 DC Characteristics Extended .................................................................. 236 Extended and Industrial............................................ 237 Industrial and Extended............................................ 233 Development Support ....................................................... 227 Device Overview................................................................... 9 E ECCP. See Enhanced Capture/Compare/PWM ECCPAS Register............................................................. 142 EEADR Register ............................................................... 120 EEADR Registers ............................................................. 119 EEADRH Registers........................................................... 119 EECON1 Register..................................................... 119, 121 EECON2 Register............................................................. 119 EEDAT Register ............................................................... 120 EEDATH Register............................................................. 120 EEPROM Data Memory Avoiding Spurious Write ........................................... 125 Write Verify ............................................................... 125 Effects of Reset PWM mode............................................................... 132 Electrical Specifications .................................................... 231 Enhanced Capture/Compare/PWM .................................. 127 Enhanced Capture/Compare/PWM (ECCP) Enhanced PWM Mode.............................................. 132 Auto-Restart ..................................................... 143 Auto-shutdown.................................................. 141 Direction Change in Full-Bridge Output Mode.. 139 Full-Bridge Application...................................... 137 Full-Bridge Mode .............................................. 137 Half-Bridge Application ..................................... 136 Half-Bridge Application Examples .................... 144 Half-Bridge Mode.............................................. 136 Output Relationships (Active-High and Active-Low)............................................... 134 Output Relationships Diagram.......................... 135 Programmable Dead Band Delay..................... 144 Shoot-through Current...................................... 144 Start-up Considerations.................................... 140 Specifications ........................................................... 247 Timer Resources ...................................................... 127 Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) ............................. 151 Errata .................................................................................... 8 EUSART ........................................................................... 151 Associated Registers Baud Rate Generator ....................................... 163 Asynchronous Mode ................................................. 153 12-bit Break Transmit and Receive .................. 169 Associated Registers Receive .................................................... 159 Transmit.................................................... 155 Auto-Wake-up on Break ................................... 168 Baud Rate Generator (BRG) ............................ 163 Clock Accuracy................................................. 160 Receiver ........................................................... 156 Setting up 9-bit Mode with Address Detect ...... 158 Transmitter ....................................................... 153 Baud Rate Generator (BRG) Auto Baud Rate Detect..................................... 167 |
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