PC312XDP512F0CFVR datasheet(395/1348 Pages) FREESCALE

395 / 1348 page

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

395

Chapter 9

Inter-Integrated Circuit (IICV2) Block Description

9.1

Introduction

The inter-IC bus (IIC) is a two-wire, bidirectional serial bus that provides a simple, efﬁcient method of data

exchange between devices. Being a two-wire device, the IIC bus minimizes the need for large numbers of

connections between devices, and eliminates the need for an address decoder.

This bus is suitable for applications requiring occasional communications over a short distance between a

number of devices. It also provides ﬂexibility, allowing additional devices to be connected to the bus for

further expansion and system development.

The interface is designed to operate up to 100 kbps with maximum bus loading and timing. The device is

capable of operating at higher baud rates, up to a maximum of clock/20, with reduced bus loading. The

maximum communication length and the number of devices that can be connected are limited by a

maximum bus capacitance of 400 pF.

9.1.1

Features

The IIC module has the following key features:

•

Compatible with I2C bus standard

•

Multi-master operation

•

Software programmable for one of 256 different serial clock frequencies

•

Software selectable acknowledge bit

•

Interrupt driven byte-by-byte data transfer

•

Arbitration lost interrupt with automatic mode switching from master to slave

•

Calling address identiﬁcation interrupt

•

Start and stop signal generation/detection

•

Repeated start signal generation

•

Acknowledge bit generation/detection

•

Bus busy detection

PC312XDP512F0CFVR Datasheet(PDF) 395 Page - Freescale Semiconductor, Inc

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