PC312XDP512F0CFVR datasheet(751/1348 Pages) FREESCALE

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Chapter 20 S12X Debug (S12XDBGV3) Module

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

753

20.3.2.3

Debug Trace Control Register (DBGTCR)

Read: Anytime

Write: Bits 7:6 only when S12XDBG is neither secure nor armed.

Bits 5:0 anytime the module is disarmed.

Address: 0x0022

76543210

TSOURCE

TRANGE

TRCMOD

TALIGN

Reset

00000000

Figure 20-5. Debug Trace Control Register (DBGTCR)

Table 20-8. DBGTCR Field Descriptions

Field

Description

7–6

TSOURCE

Trace Source Control Bits — The TSOURCE bits select the data source for the tracing session. If the MCU

system is secured, these bits cannot be set and tracing is inhibited. See Table 20-9.

5–4

TRANGE

Trace Range Bits — The TRANGE bits allow ﬁltering of trace information from a selected address range when

tracing from the S12XCPU in Detail Mode. The XGATE tracing range cannot be narrowed using these bits. To

use a comparator for range ﬁltering, the corresponding COMPE and SRC bits must remain cleared. If the

COMPE bit is not clear then the comparator will also be used to generate state sequence triggers. If the

corresponding SRC bit is set the comparator is mapped to the XGATE buses, the TRANGE bits have no effect

on the valid address range, memory accesses within the whole memory map are traced. See Table 20-10.

3–2

TRCMOD

Trace Mode Bits — See Section 20.4.5.2 for detailed Trace Mode descriptions. In Normal Mode, change of ﬂow

information is stored. In Loop1 Mode, change of ﬂow information is stored but redundant entries into trace

memory are inhibited. In Detail Mode, address and data for all memory and register accesses is stored. See

Table 20-11.

1–0

TALIGN

Trigger Align Bits — These bits control whether the trigger is aligned to the beginning, end or the middle of a

tracing session. See Table 20-12.

Table 20-9. TSOURCE — Trace Source Bit Encoding

TSOURCE

Tracing Source

No tracing requested

S12XCPU

101

1 No range limitations are allowed. Thus tracing operates as if TRANGE = 00.

XGATE

111,2

2 No Detail Mode tracing supported. If TRCMOD = 10, no information is stored.

Both S12XCPU and XGATE

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