PC312XDP512F0CFVR datasheet(785/1348 Pages) FREESCALE

785 / 1348 page

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

787

Chapter 21

External Bus Interface (S12XEBIV2)

21.1

Introduction

This document describes the functionality of the XEBI block controlling the external bus interface.

The XEBI controls the functionality of a non-multiplexed external bus (a.k.a. ‘expansion bus’) in

relationship with the chip operation modes. Dependent on the mode, the external bus can be used for data

exchange with external memory, peripherals or PRU, and provide visibility to the internal bus externally

in combination with an emulator.

21.1.1

Features

The XEBI includes the following features:

•

Output of up to 23-bit address bus and control signals to be used with a non-muxed external bus

•

Bidirectional 16-bit external data bus with option to disable upper half

•

Visibility of internal bus activity

21.1.2

Modes of Operation

•

Single-chip modes

The external bus interface is not available in these modes.

•

Expanded modes

Address, data, and control signals are activated on the external bus in normal expanded mode and

special test mode.

•

Emulation modes

The external bus is activated to interface to an external tool for emulation of normal expanded mode

or normal single-chip mode applications.

Refer to the S12X_MMC section for a detailed description of the MCU operating modes.

PC312XDP512F0CFVR Datasheet(PDF) 785 Page - Freescale Semiconductor, Inc