AT90PWM3 datasheet(107/361 Pages) ATMEL

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107

4317J–AVR–08/10

AT90PWM2/3/2B/3B

The following code examples show how to do an atomic write of the TCNTn Register contents.

Writing any of the OCRnx or ICRn Registers can be done by using the same principle.

Note:

1. The example code assumes that the part specific header file is included.

For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”

instructions must be replaced with instructions that allow access to extended I/O. Typically

“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.

The assembly code example requires that the r17:r16 register pair contains the value to be writ-

ten to TCNTn.

15.2.1

Reusing the Temporary High Byte Register

If writing to more than one 16-bit register where the high byte is the same for all registers written,

then the high byte only needs to be written once. However, note that the same rule of atomic

operation described previously also applies in this case.

15.3

Timer/Counter Clock Sources

The Timer/Counter can be clocked by an internal or an external clock source. The clock source

is selected by the Clock Select logic which is controlled by the Clock Select (CSn2:0) bits

located in the Timer/Counter control Register B (TCCRnB). For details on clock sources and

prescaler, see “Timer/Counter0 and Timer/Counter1 Prescalers” on page 82.

TABLE 5.

Assembly Code Example(1)

TIM16_WriteTCNT

; Save global interrupt flag

r18,SREG

; Disable interrupts

cli

; Set TCNT

n to r17:r16

out

TCNT

nH,r17

out

TCNT

nL,r16

; Restore global interrupt flag

out

SREG,r18

ret

C Code Example

(1)

void

TIM16_WriteTCNT

n( unsigned int i )

{

unsigned char

sreg;

unsigned int

/* Save global interrupt flag */

sreg = SREG;

/* Disable interrupts */

_CLI();

/* Set TCNT

n to i */

TCNT

n = i;

/* Restore global interrupt flag */

SREG = sreg;

}

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