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PIC18LF23K22-E/ML Datasheet(PDF) 161 Page - Microchip Technology |
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PIC18LF23K22-E/ML Datasheet(HTML) 161 Page - Microchip Technology |
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161 / 496 page ![]() 2010 Microchip Technology Inc. Preliminary DS41412C-page 161 PIC18(L)F2X/4XK22 12.0 TIMER1/3/5 MODULE WITH GATE CONTROL The Timer1/3/5 module is a 16-bit timer/counter with the following features: • 16-bit timer/counter register pair (TMRxH:TMRxL) • Programmable internal or external clock source • 2-bit prescaler • Dedicated Secondary 32 kHz oscillator circuit • Optionally synchronized comparator out • Multiple Timer1/3/5 gate (count enable) sources • Interrupt on overflow • Wake-up on overflow (external clock, Asynchronous mode only) • 16-Bit Read/Write Operation • Time base for the Capture/Compare function • Special Event Trigger (with CCP/ECCP) • Selectable Gate Source Polarity • Gate Toggle Mode • Gate Single-pulse Mode • Gate Value Status • Gate Event Interrupt Figure 12-1 is a block diagram of the Timer1/3/5 module. FIGURE 12-1: TIMER1/3/5 BLOCK DIAGRAM TMRxH TMRxL TxSYNC TxCKPS<1:0> Prescaler 1, 2, 4, 8 0 1 Synchronized clock input 2 Set flag bit TMRxIF on Overflow TMRx(2),(4) TMRxON Note 1: ST Buffer is high speed type when using TxCKI. 2: Timer1/3/5 register increments on rising edge. 3: Synchronize does not operate while in Sleep. 4: See Figure 12-2 for 16-Bit Read/Write Mode Block Diagram. 5: T1CKI is not available when the secondary oscillator is enabled. (SOSCGO = 1 or TXSOSCEN = 1) 6: T3CKI is not available when the secondary oscillator is enabled, unless T3CMX = 1. 7: Synchronized comparator output should not be used in conjunction with synchronized TxCKI. TxG FOSC/4 Internal Clock SOSCOUT 1 0 TxCKI TMRxCS<1:0> (5) Synchronize(3),(7) det Sleep input TMRxGE 0 1 00 01 10 11 TxGPOL D Q CK Q 0 1 TxGVAL TxGTM Single Pulse Acq. Control TxGSPM TxGGO/DONE TxGSS<1:0> 10 11 00 01 FOSC Internal Clock Reserved R D EN Q Q1 RD TXGCON Data Bus det Interrupt TMRxGIF Set TxCLK FOSC/2 Internal Clock D EN Q TxG_IN TMRxON Timer2/4/6 Match Comparator 1 PR2/4/6 Comparator 2 SYNCC2OUT(7) SYNCC1OUT(7) To Comparator Module ,(6) TxSOSCEN Secondary Oscillator Module See Figure 2-4 TxCLK_EXT_SRC (1) |
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