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C8051F50X Datasheet(PDF) 61 Page - Silicon Laboratories

Part # C8051F50X
Description  Mixed Signal ISP Flash MCU Family
Download  312 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F50X Datasheet(HTML) 61 Page - Silicon Laboratories

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Rev. 1.1
61
C8051F50x-F51x
Indirect Address = 0x04;
Indirect Address = 0x07;
Gain Register Definition 6.1. ADC0GNH: ADC0 Selectable Gain High Byte
Bit
7
6
5
4
3
2
1
0
Name
GAINH[7:0]
Type
W
Reset
1
1
1
1
1
1
0
0
Bit
Name
Function
7:0
GAINH[7:0] ADC0 Gain High Byte.
See Section 6.3.1 for details on calculating the value for this register.
Note
: This register is accessed indirectly; See Section 6.3.2 for details for writing this register.
Gain Register Definition 6.2. ADC0GNL: ADC0 Selectable Gain Low Byte
Bit
7
6
5
4
3
2
1
0
Name
GAINL[3:0]
Reserved
Reserved
Reserved
Reserved
Type
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Bit
Name
Function
7:4
GAINL[3:0] ADC0 Gain Lower 4 Bits.
See Figure 6.3.1 for details for setting this register.
This register is only accessed indirectly through the ADC0H and ADC0L register.
3:0
Reserved
Must Write 0000b
Note
: This register is accessed indirectly; See Section 6.3.2 for details for writing this register.


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