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C8051F50X Datasheet(PDF) 87 Page - Silicon Laboratories |
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C8051F50X Datasheet(HTML) 87 Page - Silicon Laboratories |
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87 / 312 page  Rev. 1.1 87 C8051F50x-F51x Figure 11.1. CIP-51 Block Diagram With the CIP-51's maximum system clock at 50 MHz, it has a peak throughput of 50 MIPS. The CIP-51 has a total of 109 instructions. The table below shows the total number of instructions that require each execu- tion time. Programming and Debugging Support In-system programming of the Flash program memory and communication with on-chip debug support logic is accomplished via the Silicon Labs 2-Wire Development Interface (C2). The on-chip debug support logic facilitates full speed in-circuit debugging, allowing the setting of hardware breakpoints, starting, stopping and single stepping through program execution (including interrupt service routines), examination of the program's call stack, and reading/writing the contents of registers and mem- ory. This method of on-chip debugging is completely non-intrusive, requiring no RAM, Stack, timers, or other on-chip resources. C2 details can be found in Section “28. C2 Interface” on page 306. The CIP-51 is supported by development tools from Silicon Labs and third party vendors. Silicon Labs pro- vides an integrated development environment (IDE) including editor, debugger and programmer. The IDE's debugger and programmer interface to the CIP-51 via the C2 interface to provide fast and efficient in-sys- tem device programming and debugging. Third party macro assemblers and C compilers are also avail- able. Clocks to Execute 1 2 2/3 3 3/4 4 4/5 5 8 Number of Instructions 26 50 5 14 7 3 1 2 1 DATA BUS TMP1 TMP2 PRGM. ADDRESS REG. PC INCREMENTER ALU PSW DATA BUS MEMORY INTERFACE MEM_ADDRESS D8 PIPELINE BUFFER DATA POINTER INTERRUPT INTERFACE SYSTEM_IRQs EMULATION_IRQ MEM_CONTROL CONTROL LOGIC A16 PROGRAM COUNTER (PC) STOP CLOCK RESET IDLE POWER CONTROL REGISTER SFR BUS INTERFACE SFR_ADDRESS SFR_CONTROL SFR_WRITE_DATA SFR_READ_DATA D8 D8 B REGISTER ACCUMULATOR D8 D8 D8 D8 MEM_WRITE_DATA MEM_READ_DATA SRAM ADDRESS REGISTER SRAM STACK POINTER |
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